数字锁相回路的设计
The Design of Digital Pll
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摘要: 本文提出了一种采用新型较正网络的数字锁相迴路,它适用于低频(小于1Hz)锁相系统, 具有精度高、动态响应快和频率锁定范围宽等特点.Abstract: In this paper a kind of the digital PLL (phase look-loop) with a new compensating network is presented which can be used in the low frequency (＜1 H) phase locking system. The features of PLL are high precision, quick dynamic response and large locking range.
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